DSP in Communications

The Modem Is a DSP Machine

Every time a smartphone exchanges data with a Wi-Fi access point or connects to a 5G base station, dozens of DSP algorithms execute in real time inside the device's baseband processor. Filtering, FFTs, correlation, equalization, interpolation, and error-correction decoding all run continuously — at millions of samples per second — to extract a clean bitstream from a signal distorted by the channel, buried in noise, and corrupted by interference. This is the field of digital communications, and DSP is its engine.

This lesson traces the receive chain of a modern OFDM modem — the same architecture used in Wi-Fi (802.11a/g/n/ac/ax), LTE, and 5G NR. Each block in the chain is a specific DSP algorithm. Understanding this chain connects every concept from earlier modules — the DFT, correlation, filtering, and multirate processing — to a concrete, real-world system.

OFDM: Multicarrier Modulation

A wideband wireless channel is frequency-selective — different frequency components experience different amplitude and phase shifts due to multipath propagation. A single broadband subcarrier would be severely distorted by this selectivity. OFDM sidesteps the problem by splitting the bandwidth into N narrow subcarriers, each narrow enough to experience a flat (non-selective) channel within its bandwidth.

The N subcarrier symbols are modulated by transmitting the Inverse DFT of the symbol vector. Because the IDFT produces a sum of orthogonal complex exponentials at frequencies k/NT, each subcarrier is automatically orthogonal to all others — they do not interfere with each other even though their spectra overlap. The receiver applies the forward DFT to recover each subcarrier independently in one vectorized operation.

To prevent inter-symbol interference (ISI) from the multipath channel, each OFDM symbol is preceded by a cyclic prefix (CP) — a copy of the last L samples of the symbol appended to its front, where L is at least as long as the channel impulse response. The cyclic prefix converts the linear convolution of the channel into a circular convolution, which diagonalizes in the DFT domain so that each subcarrier sees only a scalar multiplication — not a convolution.

Timing and Frequency Synchronization

Before a single subcarrier symbol can be decoded, the receiver must solve two synchronization problems. Timing synchronization finds the exact sample boundary where each OFDM symbol begins; a timing offset shifts all DFT outputs by a linear phase ramp, rotating the symbol constellation. Frequency synchronization corrects the carrier frequency offset (CFO) between the transmitter and receiver oscillators; a CFO introduces inter-carrier interference (ICI) because the subcarriers are no longer sampled at their orthogonality points.

Modern receivers solve both problems using preamble correlation. The transmitter prepends each packet with a known training sequence. The receiver continuously cross-correlates the incoming samples with a local copy of the preamble. The correlation peak identifies the symbol boundary (timing); the phase difference between two identical halves of a repeated preamble measures the fractional CFO. This correlation is computed efficiently with a sliding window accumulator — an application of the matched filter concept from Module 10.

After coarse timing and frequency correction, the receiver applies a phase-locked loop (PLL) to track residual phase noise sample-by-sample. The PLL is itself a first-order IIR feedback system, with its loop bandwidth chosen to be wide enough to track phase noise but narrow enough to reject additive noise — a classic DSP trade-off between tracking bandwidth and noise floor.

Channel Estimation and Equalization

Even after synchronization, the channel attenuates and phase-shifts each subcarrier by a different complex scalar. Before symbols can be decoded, the receiver must estimate these per-subcarrier channel coefficients and invert them. This is channel equalization in the frequency domain, and it is one of OFDM's key advantages: each subcarrier requires only a single complex division, not a full FIR filter.

Channel estimation uses pilot subcarriers — subcarriers carrying known symbols rather than data. The receiver observes the received pilot values, divides by the known transmitted values, and obtains the channel frequency response at the pilot locations. It then interpolates (using linear or DFT-based interpolation from Module 11) to estimate the channel at all data subcarrier frequencies. This pilot-interpolation approach balances estimation accuracy against the overhead cost of dedicating subcarriers to pilots rather than data.

On subcarriers where the channel is deeply faded (|H[k]| ≈ 0), zero-forcing equalization amplifies noise catastrophically. MMSE equalization avoids this by regularizing the inversion: the denominator adds a noise power term that prevents the gain from exceeding 1/SNR. MMSE is optimal when the noise variance is known and introduces only a small bias in exchange for a large reduction in noise amplification on weak subcarriers.

Error Correction Decoding

Even after equalization, the recovered symbols contain soft errors from additive noise. Forward error correction (FEC) is the mechanism that converts these soft, noisy decisions into a reliable bitstream. Every modern wireless standard appends redundancy at the transmitter using a channel code; the receiver's decoder exploits this redundancy to correct errors.

Wi-Fi and early LTE use convolutional codes decoded by the Viterbi algorithm — a dynamic programming search through a trellis of encoder states. Each step in the trellis is scored by the log-likelihood of the received soft symbol given the hypothesized transmitted bit. The Viterbi algorithm finds the maximum-likelihood path through the trellis in O(N · 2^K) operations, where K is the constraint length of the code. LTE Release 8 also introduced turbo codes with iterative decoding between two constituent convolutional decoders, approaching Shannon capacity within 0.5 dB.

5G NR replaced turbo codes with LDPC codes (Low-Density Parity-Check codes) and polar codes. LDPC decoding uses the belief propagation algorithm on a sparse bipartite Tanner graph: variable nodes (one per code bit) and check nodes (one per parity equation) iteratively exchange log-likelihood ratio (LLR) messages until the decoded bits satisfy all parity constraints or a maximum iteration count is reached. LDPC codes are parallelizable and are decoded in hardware at multi-Gbps rates in modern 5G chips.

The Complete Receive Chain

The stages of an OFDM receiver connect into a linear processing chain, each stage a different DSP algorithm:

The ADC digitizes the analog baseband signal at 2× the bandwidth (Nyquist rate). Synchronization finds the symbol boundary and corrects the carrier offset via preamble correlation. Cyclic prefix removal strips the guard interval before the DFT. The FFT transforms the time-domain symbol into the frequency domain in O(N log N). Channel equalization applies the per-subcarrier complex division. Finally, FEC decoding converts soft symbol LLRs into a reliable bitstream.

This entire chain operates continuously on overlapping blocks, typically pipelined in hardware. A Wi-Fi 6 (802.11ax) chip processes 8 spatial streams at 80 MHz each, running 8 parallel 1024-point FFTs every 12.8 µs — representing over 5 billion multiplications per second, implemented in a few square millimeters of CMOS silicon using fixed-point arithmetic and highly parallelized VLSI DSP architectures.